A flexible VLSI architecture for variable block size segment matching with luminance correction
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
VLSI Architecture for a Flexible Motion Estimation with Parameters
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Center of mass-based adaptive fast block motion estimation
Journal on Image and Video Processing
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In this paper, we present a new approach to find the best quadtree for variable block size (VBS) motion estimation for video coding. In this approach, the quantizer which encodes the prediction residual is also jointly optimized in a rate-distortion sense. The desired balance of the bit allocation between the motion vector coding and the residual error coding is achieved by a Lagrange multiplier approach for the joint optimization problem. A fast tree optimization technique is used to reduce the computational complexity of the algorithm so that it can be run in realtime in a appropriate hardware.