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FTCS '96 Proceedings of the The Twenty-Sixth Annual International Symposium on Fault-Tolerant Computing (FTCS '96)
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FTCS '96 Proceedings of the The Twenty-Sixth Annual International Symposium on Fault-Tolerant Computing (FTCS '96)
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ITC '01 Proceedings of the 2001 IEEE International Test Conference
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Transient Signal Analysis (TSA) is a Go/No-Go device Testing method that is based on the analysis of voltage Transients at multiple test points. In this paper, a techniquebased on an extension to TSA is presented that is able topredict critical path delay using data from non-critical(predictor) path tests. A characterization phase is performeda priori in which both predictor path and critical path delays are measured from a set of defect-free devices.The characterization data is used to define the relationshipbetween the power supply transient signal data and theactual delays. Once established, prediction is performedduring production test by simply re-analyzing the datafrom the predictor path Go/No-Go TSA tests, and therefore,no speed bin testing is required. Simulations on an 8-bit multiplier are used to demonstrate a linear relationshipbetween a range of supply rail Fourier Phase harmonicsand delay under various process models. The accuracy of the prediction is evaluated statistically against the measured delays from an additional set of critical pathsimulations.