ON-THE-SHELF CORE PATTERN METHODOLOGYFOR COLDFIRE® MICROPROCESSOR CORES

  • Authors:
  • Teresa L. McLaurin;John C. Potter

  • Affiliations:
  • -;-

  • Venue:
  • ITC '00 Proceedings of the 2000 IEEE International Test Conference
  • Year:
  • 2000

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Abstract

This paper describes how pattern sets are chosen and puton-the-shelf for ColdFire hard microprocessor cores.Some considerations are the frequency of the pattern set,the number of each type of pattern set needed and theformat in which the patterns are saved. These decisionsmust be made without the knowledge of restrictions thatwill be on the device in which the core will be embedded.Restrictions such as the tester frequency and memorylimitations, the pad frequency limitations and the packagepin and power limitations are discussed. The pattern setmust be flexible enough to address many of these issues"on the fly". How the pattern set is chosen for the hardcore and how it is made flexible are the challenges thatwill be addressed in this paper.