Optimal INL/DNL Testing of A/D Converters Using a Linear Model

  • Authors:
  • Affiliations:
  • Venue:
  • ITC '00 Proceedings of the 2000 IEEE International Test Conference
  • Year:
  • 2000

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Abstract

As Analog to Digital Converters continue to improvein resolution, their linearity testing has become increasinglychallenging in terms of test accuracy and test time.In this paper, we present a technique for estimation thelinearity metrics of an ADC that is optimal in terms ofexpected r.m.s error in INL/DNL estimates, for a giventest time. Experimental results measured on an ADC fromindustry to validate the effectiveness of the technique arepresented.