Testing semiconductor memories: theory and practice
Testing semiconductor memories: theory and practice
Serial Interfacing for Embedded-Memory Testing
IEEE Design & Test
Built-In Self-Test for Multi-Port RAMs
ATS '97 Proceedings of the 6th Asian Test Symposium
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Time Domain Multiplex (TDM) SRAMs are a new type ofmulti-port SRAMs. Due to their small area and flexibility,they have found a wide range of applications intelecommunication ASICs. For a TDM SRAM, thememory core runs many times faster than the circuits thataccess it. In other words, the memory runs at an internalclock that is much faster than the system clock. This slowsystem clock coupled with the fast internal clock createsnew challenges for at-speed testing of TDM SRAMs. Thispaper proposes a novel BIST solution for at-speed testingof TDM SRAMs with a slow system clock. The solutioncan be implemented with most commercial BISTcontrollers for conventional SRAMs. All the requiredmodifications can be included in a modified memorycollar. The hardware addition is small. The test time is thesame as that for a conventional multi-port SRAM of thesame size.