An Embedded Core for Sub-Picosecond Timing Measurements

Authors:
Sassan Tabatabaei;André Ivanov
Affiliations:
-;-
Venue:
ITC '02 Proceedings of the 2002 IEEE International Test Conference
Year:
2002

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Abstract

The continued market demand for GHz processors and high-capacity communication systems results in an increasing number of low-cost high volume ICs with multi-GHz clocks and/or multi-Gb/s serial communication interfaces. For such devices, timing specifications, e.g., jitter and skew, in the range of few picoseconds (RMS and/or p-p) are common. We describe an embedded core that allows such measurements. The core is small, functionally non-intrusive,and easily scalable for testing multiple circuits and signals on the chip. To reach the required sub-picosecond accuracy, we present a novel measurement and data processing technique,based on noise scaling. The core has a standard low-speed serial interface.