Model checking in industrial hardware design
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Integrating formal verification methods with a conventional project design flow
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Checking formal specifications under simulation
ICCD '97 Proceedings of the 1997 International Conference on Computer Design (ICCD '97)
To Model Check Or Not To Model Check
ICCD '98 Proceedings of the International Conference on Computer Design
An Approach to Verify a Large Scale System-on-a-chip Using Symbolic Model Checking
ICCD '98 Proceedings of the International Conference on Computer Design
Model Checking of a Real ATM Switch
ICCD '98 Proceedings of the International Conference on Computer Design
Model checking of S3C2400X industrial embedded SOC product
Proceedings of the 38th annual Design Automation Conference
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This paper describes our experience and methodology used in the formal verification of an industrial embedded SOC product composed of the ARM920T processor core and 16 function modules, i.e., IPs. We employed the formal verification to verify the RTL implementation of each module. We used the model checking to make the RTL golden model and the equivalence checking to verify the following refinements. Specifically, we describe 1) the selection of a model checker and a modeling language, 2) the modeling of multiple clocks and gated clocks using the implicit clock of the model checker, 3) the translation between Verilog and the model checking language, and 4) the module verification strategy including the problem size reduction techniques. Results of applying the proposed verification strategy to our design are also covered.