RTSS '03 Proceedings of the 24th IEEE International Real-Time Systems Symposium
Early analysis tools for system-on-a-chip design
IBM Journal of Research and Development
Exact High Level WCET Analysis of Synchronous Programs by Symbolic State Space Exploration
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
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Abstract: We present a new temporal logic for the specification and verification of real-time systems. This logic is defined on discrete time transition systems which are interpreted in an abstract manner instead of the usual stuttering interpretation. Our approach directly allows the abstraction of real-time systems by ignoring irrelevant qualitative properties, but without loosing any quantitative information.