Sublogarithmic Deterministic Selection on Arrays with a Reconfigurable Optical Bus
IEEE Transactions on Computers
More Efficient Topological Sort Using Reconfigurable Optical Buses
The Journal of Supercomputing
Multiple Addition and Prefix Sum on a Linear Array with a Reconfigurable Pipelined Bus System
The Journal of Supercomputing
An Efficient R-Mesh Implementation of LDPC Codes Message-Passing Decoder
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 8 - Volume 09
Linear array with a reconfigurable pipelined bus system - Concepts and applications
Information Sciences: an International Journal
Computing on the restricted LARPBS model
ISPA'03 Proceedings of the 2003 international conference on Parallel and distributed processing and applications
Faster sorting on a linear array with a reconfigurable pipelined bus system
ISPA'03 Proceedings of the 2003 international conference on Parallel and distributed processing and applications
simulating a PR-mesh on an larpbs
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
| Hi-index | 0.00 |
Abstract: We present deterministic algorithms for integer sorting and on-line packet routing on arrays with reconfigurable optical buses. The main objective is to identify the mechanisms specific to this type of architecture which allow building efficient integer sorting, partial permutation routing and h-relations algorithms. The consequences of these results on PRAM simulations are also investigated.