Communicating sequential processes
Communicating sequential processes
Embedded real-time systems
Specification and design of embedded systems
Specification and design of embedded systems
Bounded scheduling of process networks
Bounded scheduling of process networks
Hardware-software co-design of embedded systems: the POLIS approach
Hardware-software co-design of embedded systems: the POLIS approach
Proceedings of the 37th Annual Design Automation Conference
System-level codesign of mixed hardware-software systems
System-level codesign of mixed hardware-software systems
Efficient Combinational Loops Handling for Cycle Precise Simulation of System on a Chip
EUROMICRO '98 Proceedings of the 24th Conference on EUROMICRO - Volume 1
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Abstract: We present a hardware and software tool box that allows to map an initial specification done in term of tasks communicating through FIFOs onto a HW/SW architecture. Communication templates are used to characterize the way data are exchanged between tasks realized either in software or in hardware. From these templates, we define the specifications -in terms of resources necessary to handle the communications- of a hardware module and a set of software drivers. These Interface Modules and their software counterparts allow simple Virtual Component reuse since they not only implement protocol compatibility through the use of the VCI/OCB standard but also system level communications through semantics widely accepted in the design community. The interface modules have been used in the COSY project for the implementation of a video decoder by Philips starting from a system-level description and performing communication refinement using Cadence VCC and Philips' own communication schemes.