Deadlock-Free Message Routing in Multiprocessor Interconnection Networks
IEEE Transactions on Computers
The warp computer: Architecture, implementation, and performance
IEEE Transactions on Computers
Computer networks
Warp: an integrated solution of high-speed parallel computing
Proceedings of the 1988 ACM/IEEE conference on Supercomputing
The design of nectar: a network backplane for heterogeneous multicomputers
ASPLOS III Proceedings of the third international conference on Architectural support for programming languages and operating systems
Network-based multicomputers: redefining high performance computing in the 1990s
Proceedings of the decennial Caltech conference on VLSI on Advanced research in VLSI
Supporting the hypercube programming model on mesh architectures: (a fast sorter for iWarp tori)
SPAA '92 Proceedings of the fourth annual ACM symposium on Parallel algorithms and architectures
Supporting sets of arbitrary connections on iWarp through communication context switches
SPAA '93 Proceedings of the fifth annual ACM symposium on Parallel algorithms and architectures
A Framework for Designing Deadlock-Free Wormhole Routing Algorithms
IEEE Transactions on Parallel and Distributed Systems
Supporting systolic and memory communication in iWarp
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Compiled communication for all-optical TDM networks
Supercomputing '96 Proceedings of the 1996 ACM/IEEE conference on Supercomputing
Switch Design to Enable Predictive Multiplexed Switching in Multiprocessor Networks
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Papers - Volume 01
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The iWarp processor is a building block for parallel systems and is developed in a joint project by Carnegie Mellon University and Intel Corporation. The iWarp processor integrates computation and communication: the iWarp component architecture consists of a computation agent, capable of delivering 20 MFLOPS and 20 MIPS, and a communication agent that provides a bandwidth of 320 MBytes/sec. We expect the first iWarp-based system to be available early 1990, organized as a 8X8 two-dimensional torus.Fast inter-processor communication is crucial for the success of a parallel system, and this paper describes communication in iWarp systems. We review the communication models, message passing and systolic communication, that this architecture aims to support and introduce the types of networks that can be realized by the iWarp communication agent. We also sketch a programmer interface to these networks and give usage examples for iWarp networks.