Communications of the ACM - Special section on computer architecture
Interconnection networks for large-scale parallel processing: theory and case studies
Interconnection networks for large-scale parallel processing: theory and case studies
Performance of the Direct Binary n-Cube Network for Multiprocessors
IEEE Transactions on Computers
The composite binary cube — a family of interconnection networks for multiprocessors
ICS '89 Proceedings of the 3rd international conference on Supercomputing
A Distributed Resource Management Mechanism for a Partitionable Multiprocessor System
IEEE Transactions on Computers
A large scale, homogeneous, fully distributed parallel machine, I
ISCA '77 Proceedings of the 4th annual symposium on Computer architecture
IEEE Transactions on Parallel and Distributed Systems
Broadcast communication delay metric for the iPSC/2 and iPSC/860 hypercubes
ACM-SE 30 Proceedings of the 30th annual Southeast regional conference
Manipulating General Vectors on Synchronous Binary N-Cube
IEEE Transactions on Computers
A Family of Parallel Prefix Algorithms Embedded in Networks
IEEE Transactions on Parallel and Distributed Systems
A customized cross-bar for data-shuffling in domain-specific simd processors
ARCS'07 Proceedings of the 20th international conference on Architecture of computing systems
Formal specification of interconnection networks
FP'95 Proceedings of the 1995 international conference on Functional Programming
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The exact structural relationship between the hypercube and multistage interconnection networks for multiprocessors is characterized here. By varying the node architecture, structures other than these two interconnection schemes can be derived.