Gate and throughput optimizations for null convention self-timed digital circuits

NULL Convention multiply and accumulate unit with conditional rounding, scaling, and saturation

Journal of Systems Architecture: the EUROMICRO Journal

Development of a large word-width high-speed asynchronous multiply and accumulate unit

Integration, the VLSI Journal

Design and characterization of NULL convention arithmetic logic units

Microelectronic Engineering

Designing layout-timing independent quantum-dot cellular automata (QCA) circuits by global asynchrony

Journal of Systems Architecture: the EUROMICRO Journal

Development of a large word-width high-speed asynchronous multiply and accumulate unit

Integration, the VLSI Journal