A Two-level Co-Design Framework for Xputer-based data-driven reconfigurable Accelerators

Authors:
Reiner W. Hartenstein;Jürgen Becker
Affiliations:
-;-
Venue:
HICSS '97 Proceedings of the 30th Hawaii International Conference on System Sciences: Advanced Technology Track - Volume 5
Year:
1997

Citing 0
Cited 3

Domain-specific interface generation from dataflow specifications

Proceedings of the 6th international workshop on Hardware/software codesign
A Novel Sequencer Hardware for Application Specific Computing

ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
Performance Analysis in CoDe-X Partitioning for Structural Programmable Accelerators

CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design

Quantified Score

Hi-index	0.00

Visualization

Abstract

The paper presents the parallelizing compilationenvironment CoDe-X for simultaneous programming ofXputer-based accelerators and their host. The paperintroduces its hardware/software co-design strategies attwo levels of partitioning. CoDe-X performs both, at firstlevel a profiling-driven host/accelerator partitioning forperformance optimization, and at second level a resourcedrivensequential/structural partitioning of the acceleratorsource code to optimize the utilization of its reconfigurableresources. To stress the significance of this applicationdevelopment methodology, the paper first gives anintroduction to the underlying hardware platform.