N-detection under transparent-scan
Proceedings of the 42nd annual Design Automation Conference
Test compaction for transition faults under transparent-scan
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Estimating path delay distribution considering coupling noise
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Accurate timing analysis using SAT and pattern-dependent delay models
Proceedings of the conference on Design, automation and test in Europe
Reducing the switching activity of test sequences under transparent-scan
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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We present our experiences generating scan-based critical-pathtests for the partial-scan Alpha 21364 microprocessor, includingthe effects of crosstalk and multiple-inputs switching on pathdelay. Insufficient scan penetration made this difficult[1], but anew ATPG algorithm increased our coverage. Comparison with actualsilicon shows interesting results; we explain them with statisticalanalysis, factoring the effect of statistical process variationinto the effects of crosstalk and multiple-input switching ondelay. Finally, we draw conclusions about how to help make futuredesigns amenable to speed testing.