Circuit analysis, simulation, and design: general aspects of circuit analysis and design
Circuit analysis, simulation, and design: general aspects of circuit analysis and design
COSMOS: a compiled simulator for MOS circuits
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Automatic generation of behavioral models from switch-level descriptions
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
The Waveform Relaxation Method for Time-Domain Analysis of Large Scale Integrated Circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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This paper discusses NETHDL, a system for automatic generation of high-level RTL models from switch-level circuit netlist descriptions.NETHDL abstracts several difficult constructs into high-level code using a powerful algorithmic translation which does not sacrifice logic accuracy. NETHDL recognizes constructs such as busses, feedback loops, memory elements, registers, blocks of pass-transistor logic and elements containing contention.NETHDL exploits information from its static circuit analyzer to obtain a highly abstracted model with the same functionality as the netlist. It also uses information about the circuit such as structure, hierarchy and functionality in the generation process. New Algorithms are proposed and have been implemented. In all exercised circuits, a significant speedup has been obtained in simulator run-time.