A Built-in-Self-Test Scheme for Digital to Analog Converters

Authors:
Sunil Rafeeque;Vinita Vasudevan
Affiliations:
-;-
Venue:
VLSID '04 Proceedings of the 17th International Conference on VLSI Design
Year:
2004

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Abstract

This paper describes a new Built-In-Self-Test(BIST)scheme for estimation of static non-linearity errors in digitalto analog converters (DACs). The BIST schememeasures each transition and estimates non-linearity errors.It makes use of a sample and subtract circuit and aVCO. The circuit is designed using 0:35µm CMOS technologyfrom AMS. The simulation results are included inthis paper. Errors estimated using the BIST scheme simulationmatch well with measured errors.