A left-edge algorithm approach for scheduling and allocation of hardware contexts in dynamically reconfigurable architectures

Authors:
Remy Eskinazi Sant'Anna;Manoel Eusebio de Lima;Paulo Romero Martins Maciel
Affiliations:
Pernambuco University, Recife, Brazil;Federal University of Pernambuco, Recife, Brazil;Federal University of Pernambuco, Recife, Brazil
Venue:
FPGA '04 Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays
Year:
2004

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Abstract

This work aims to describe a methodology for scheduling and allocation of hardware contexts, in applications with high degree of parallelism, in a Run-Time-Reconfiguration (RTR) proceeding for a reconfigurable FPGA. The Scheduling approach is based on the hardware resource distribution in the FPGA architecture. The Scheduler is modeled as a Petri Net and the best performance yields the best scheduling. The hardware contexts allocation is based on a Left-Edge algorithm principle for rationalization of resources in scheduling approach. The adaptation of the algorithm considers that pre-located areas for loading of the contexts in the architecture are used.