Test Compression and Hardware Decompression for Scan-Based SoCs

  • Authors:
  • Francis G. Wolff;Chris Papachristou;David R. McIntyre

  • Affiliations:
  • -;-;-

  • Venue:
  • Proceedings of the conference on Design, automation and test in Europe - Volume 1
  • Year:
  • 2004

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Abstract

We present a new decompression architecture suitable for embedded cores in SoCs which focuses on improving the download time by avoiding higher internal-to-ATE clock ratios and by exploiting hardware parallelism. The Bounded Huffman compression facilitates decompression hardware tradeoffs. Our technique is scalable in that the downloadable RAM-based decode table and accommodates for different SoC cores with different characteristics such as the number of scan chains and test set data distributions.