Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology

Authors:
Pablo Viana;Edna Barros;Sandro Rigo;Rodolfo Azevedo;Guido Araújo
Affiliations:
-;-;-;-;-
Venue:
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Year:
2004

Citing 4
Cited 1

Surviving the SOC revolution: a guide to platform-based design

Surviving the SOC revolution: a guide to platform-based design
System-level exploration for Pareto-optimal configurations in parameterized system-on-a-chip (December 2002)

IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Exploring Memory Hierarchy with ArchC

SBAC-PAD '03 Proceedings of the 15th Symposium on Computer Architecture and High Performance Computing
MiBench: A free, commercially representative embedded benchmark suite

WWC '01 Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop

The ArchC architecture description language and tools

International Journal of Parallel Programming

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Abstract

This paper presents an environment based on SystemC for architecture specification of programmable systems. Making use of the new architecture description language ArchC, able to capture the processor description as well as the memory subsystem configuration, this environment offers support for system-level specification, intended for platform-based design. As a case study, it is presented the memory architecture exploration for a simple image processing application, yet a more robust environment evaluation is performed through the execution of some real-world benchmarks.