Power analysis of embedded software: a first step towards software power minimization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Bus-invert coding for low-power I/O
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Profile-driven program synthesis for evaluation of system power dissipation
DAC '97 Proceedings of the 34th annual Design Automation Conference
Application-driven synthesis of core-based systems
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
A framework for estimation and minimizing energy dissipation of embedded HW/SW systems
DAC '98 Proceedings of the 35th annual Design Automation Conference
Interface exploration for reduced power in core-based systems
Proceedings of the 11th international symposium on System synthesis
Cycle-accurate simulation of energy consumption in embedded systems
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Selective cache ways: on-demand cache resource allocation
Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture
Energy estimation for 32-bit microprocessors
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Interface and cache power exploration for core-based embedded system design
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
A programmable unified cache architecture for embedded applications
CASES '00 Proceedings of the 2000 international conference on Compilers, architecture, and synthesis for embedded systems
Instruction-based system-level power evaluation of system-on-a-chip peripheral cores
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Towards a high-level power estimation capability [digital ICs]
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Information theoretic measures for power analysis [logic design]
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
High-level power modeling, estimation, and optimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Local memory exploration and optimization in embedded systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Pareto-optimization-based run-time task scheduling for embedded systems
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Fast Exploration of Parameterized Bus Architecture for Communication-Centric SoC Design
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Methods for evaluating and covering the design space during early design development
Integration, the VLSI Journal
A Systematic Approach to Exploring Embedded System Architectures at Multiple Abstraction Levels
IEEE Transactions on Computers
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Decision-theoretic exploration of multiProcessor platforms
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
Energy-efficient dynamic memory allocators at the middleware level of embedded systems
EMSOFT '06 Proceedings of the 6th ACM & IEEE International conference on Embedded software
Journal of Embedded Computing - Cache exploitation in embedded systems
Efficient design space exploration for application specific systems-on-a-chip
Journal of Systems Architecture: the EUROMICRO Journal
Proceedings of the 44th annual Design Automation Conference
Design methodology for pipelined heterogeneous multiprocessor system
Proceedings of the 44th annual Design Automation Conference
Fundamenta Informaticae - The Fourth Special Issue on Applications of Concurrency to System Design (ACSD05)
Reducing complexity of multiobjective design space exploration in VLIW-based embedded systems
ACM Transactions on Architecture and Code Optimization (TACO)
An Hybrid Soft Computing Approach for Automated Computer Design
Proceedings of the 2006 conference on STAIRS 2006: Proceedings of the Third Starting AI Researchers' Symposium
Strength pareto particle swarm optimization and hybrid ea-pso for multi-objective optimization
Evolutionary Computation
Rapid design space exploration using legacy design data and technology scaling trend
Integration, the VLSI Journal
Supervised design space exploration by compositional approximation of Pareto sets
Proceedings of the 48th Design Automation Conference
Fundamenta Informaticae - The Fourth Special Issue on Applications of Concurrency to System Design (ACSD05)
A performance and energy comparison of convolution on GPUs, FPGAs, and multicore processors
ACM Transactions on Architecture and Code Optimization (TACO) - Special Issue on High-Performance Embedded Architectures and Compilers
Efficient design space exploration for component-based system design
Proceedings of the International Conference on Computer-Aided Design
Compositional system-level design exploration with planning of high-level synthesis
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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In this work, we provide a technique for efficiently exploring the power/performance design space of a parameterized system-on-chip (SOC) architecture to find all Pareto-optimal configurations. These Pareto-optimal configurations will represent the range of power and performance tradeoffs that are obtainable by adjusting parameter values for a fixed application that is mapped on the SOC architecture. Our approach extensively prunes the potentially large configuration space by taking advantage of parameter dependencies. We have successfully applied our technique to explore Pareto-optimal configurations of our SOC architecture for a number of applications.