Wattch: a framework for architectural-level power analysis and optimizations
Proceedings of the 27th annual international symposium on Computer architecture
Computer Networks: The International Journal of Computer and Telecommunications Networking - Network processors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Fine-grain design space exploration for a cartographic SoC multiprocessor
ACM SIGARCH Computer Architecture News
A multiobjective optimization model for exploring multiprocessor mappings of process networks
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Methods for evaluating and covering the design space during early design development
Integration, the VLSI Journal
A Systematic Approach to Exploring Embedded System Architectures at Multiple Abstraction Levels
IEEE Transactions on Computers
Rapid Performance and Power Consumption Estimation Methods for Embedded System Design
RSP '06 Proceedings of the Seventeenth IEEE International Workshop on Rapid System Prototyping
Muiltiobjective optimization using nondominated sorting in genetic algorithms
Evolutionary Computation
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
Strength pareto particle swarm optimization and hybrid ea-pso for multi-objective optimization
Evolutionary Computation
IEEE Transactions on Evolutionary Computation
System-level design: orthogonalization of concerns and platform-based design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Platune: a tuning framework for system-on-a-chip platforms
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A multiobjective genetic approach for system-level exploration in parameterized systems-on-a-chip
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
On learning-based methods for design-space exploration with high-level synthesis
Proceedings of the 50th Annual Design Automation Conference
DSD '13 Proceedings of the 2013 Euromicro Conference on Digital System Design
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Embedded systems are widely used today in different digital signal processing (DSP) applications that usually require high computation power and tight constraints. The design space to be explored depends on the application domain and the target platform. A tool that helps explore different architectures is required to design such an efficient system. This paper proposes an architecture exploration framework for DSP applications based on Particle Swarm Optimization (PSO) and genetic algorithms (GA) techniques that can handle multiobjective optimization problems with several hybrid forms. A novel approach for performance evaluation of embedded systems is also presented. Several cycle-accurate simulations are performed for commercial embedded processors. These simulation results are used to build an artificial neural network (ANN) model that can predict performance/power of newly generated architectures with an accuracy of 90% compared to cycle-accurate simulations with a very significant time saving. These models are combined with an analytical model and static scheduler to further increase the accuracy of the estimation process. The functionality of the framework is verified based on benchmarks provided by our industrial partner ON Semiconductor to illustrate the ability of the framework to investigate the design space.