Fuzzy decision making in embedded system design
CODES+ISSS '06 Proceedings of the 4th international conference on Hardware/software codesign and system synthesis
Efficient design space exploration for application specific systems-on-a-chip
Journal of Systems Architecture: the EUROMICRO Journal
Reducing complexity of multiobjective design space exploration in VLIW-based embedded systems
ACM Transactions on Architecture and Code Optimization (TACO)
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
An Hybrid Soft Computing Approach for Automated Computer Design
Proceedings of the 2006 conference on STAIRS 2006: Proceedings of the Third Starting AI Researchers' Symposium
Region-based routing: a mechanism to support efficient routing algorithms in NoCs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Rapid design space exploration using legacy design data and technology scaling trend
Integration, the VLSI Journal
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This paper deals with a significant problem affecting embedded system design methods based on parameterized systems on a chip (SOCs). It proposes a strategy for exploration of the configuration space of a parameterized SOC architecture to determine an accurate approximation of the power/performance Pareto-front. The strategy is based on genetic algorithms and is thoroughly evaluated in terms of accuracy, efficiency, and scalability using SOC platforms that differ as regards both architectural model and complexity. The results obtained show that the proposed approach gives an excellent approximation of the Pareto-optimal front in very short exploration times (up to two orders of magnitude shorter than those required by one of the best known and widely referenced approaches in the literature). In addition, our approach possesses a good degree of scalability as performance levels are maintained even when the architectural complexity increases.