Bus-invert coding for low-power I/O
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Interface co-synthesis techniques for embedded systems
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Re-mapping for low power under tight timing constraints
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
High-level power modeling, estimation, and optimization
DAC '97 Proceedings of the 34th annual Design Automation Conference
On average power dissipation and random pattern testability of CMOS combinational logic networks
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Coding a terminated bus for low power
GLSVLSI '95 Proceedings of the Fifth Great Lakes Symposium on VLSI (GLSVLSI'95)
Bus-Based Communication Synthesis on System-Level
ISSS '96 Proceedings of the 9th international symposium on System synthesis
Incorporating cores into system-level specification
Proceedings of the 11th international symposium on System synthesis
System-level power optimization: techniques and tools
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
System-level power optimization: techniques and tools
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Code compression for low power embedded system design
Proceedings of the 37th Annual Design Automation Conference
Interface and cache power exploration for core-based embedded system design
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Fast cache and bus power estimation for parameterized system-on-a-chip design
DATE '00 Proceedings of the conference on Design, automation and test in Europe
A hybrid approach for core-based system-level power modeling
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Parameterised system design based on genetic algorithms
Proceedings of the ninth international symposium on Hardware/software codesign
Instruction-based system-level power evaluation of system-on-a-chip peripheral cores
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Code compression for VLIW processors using variable-to-fixed coding
Proceedings of the 15th international symposium on System Synthesis
Access pattern-based memory and connectivity architecture exploration
ACM Transactions on Embedded Computing Systems (TECS)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
System-Level Point-to-Point Communication Synthesis Using Floorplanning Information
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Power efficient encoding techniques for off-chip data buses
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Power Aware Interface Synthesis for Bus-Based SoC Designs
Proceedings of the conference on Design, automation and test in Europe - Volume 2
On-Chip Communication Architectures: System on Chip Interconnect
On-Chip Communication Architectures: System on Chip Interconnect
Energy-efficient encoding techniques for off-chip data buses
ACM Transactions on Embedded Computing Systems (TECS)
Interframe bus encoding technique and architecture for MPEG-4 AVC/H.264 video compression
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Approximate arithmetic coding for bus transition reduction in low power designs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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