Two dimensional codes for low power
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Interface exploration for reduced power in core-based systems
Proceedings of the 11th international symposium on System synthesis
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Bus encoding for low-power high-performance memory systems
Proceedings of the 37th Annual Design Automation Conference
Power-optimal encoding for a DRAM address bus
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Design theory and implementation for low-power segmented bus systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Weight-Based Bus-Invert Coding for Low-Power Applications
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Memory Bus Encoding for Low Power: A Tutorial
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
Frequent value encoding for low power data buses
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Optimal memoryless encoding for low power off-chip data buses
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Data bus inversion in high-speed memory applications
IEEE Transactions on Circuits and Systems II: Express Briefs
Designing efficient codecs for bus-invert berger code for fully asymmetric communication
IEEE Transactions on Circuits and Systems II: Express Briefs
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Coding was proposed as a general method of decreasing power dissipation for the I/O. Lower power dissipation can be obtained by using extra bus liner for coding the data. This paper presents an application of the general theory of limited-weight codes for a class of parallel terminated buses with pull-up terminators (e.g. Rambus). Power dissipation on such a bus-line is larger for a logical 1 and it follows that patterns with few 1s should be chosen. A perfect k/2-limited weight code equivalent to the previously proposed Bus-Invert method and a novel non-perfect 3-limited weight code are described. Both codes can be algorithmically generated and practical issues related to their implementation on the Rambus are discussed.