Bus-invert coding for low-power I/O
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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We carry out a comprehensive study on the weight-based, in contrast to the Hamming-distance-based, bus-invert method for reducing I/O power consumption. The closed-form formulas derived from the Markov chains depicting the transient and limiting behaviors of the bus-invert method are employed to compute the weight and switching activity, to explain the deminishing returns on the weight with increasing bus width, to show the non-viability of partitioning a bus into smaller busses with odd number bits, etc. Neither the Hamming-distance nor the weight-based approach can simultaneously reduce the weight and switching activity, but the latter outperforms the former in reducing the sum of weight and switching activity.