Principles of CMOS VLSI design: a systems perspective
Principles of CMOS VLSI design: a systems perspective
Codes to reduce switching transients across VLSI I/O pins
ACM SIGARCH Computer Architecture News
Bus-invert coding for low-power I/O
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
System-level power optimization of special purpose applications: the beach solution
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Exploiting the locality of memory references to reduce the address bus energy
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
A coding framework for low-power address and data busses
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Low-string on-chip signaling techniques: effectiveness and robustness
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low-power electronics and design
Partial bus-invert coding for power optimization of application-specific systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
GLS '97 Proceedings of the 7th Great Lakes Symposium on VLSI
Weight-Based Bus-Invert Coding for Low-Power Applications
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
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Reducing the power dissipated by buses becomes one of the most important elements in low-power VLSI design. A new coding scheme called sequence-switch coding (SSC) is proposed in this paper. It is a general-purpose coding scheme that employs the sequence of data in reducing the number of transitions on buses. A simple switching algorithm is presented to show the feasibility of SSC. According to simulations, this algorithm reduces around 10% of bus transitions in the transmission of benchmark files. SSC can be used for burst data transfer in any application. In particular, it is suitable for internet and multimedia applications that have stream-type data transfer pattern.