Bus-invert coding for low-power I/O
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low-power electronics and design
Low-leakage asymmetric-cell SRAM
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Berger-invert code is a coding scheme proposed recently to protect communication channels against all asymmetric errors and to decrease power consumption. This brief proposes a modified encoding scheme of Berger-invert codes and a new design of encoding/decoding circuitry (a codec). Implementation results prove that the new approach reduces the codec area and power consumption, respectively, by up to 30% and 48% for a 32-bit bus and decreases the error rate by up to about 35% for a 6-bit bus.