Equation-based behavioral model generation for nonlinear analog circuits
DAC '96 Proceedings of the 33rd annual Design Automation Conference
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System identification (2nd ed.): theory for the user
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Proceedings of the conference on Design, automation and test in Europe
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BMAS '00 Proceedings of the 2000 IEEE/ACM international workshop on Behavioral modeling and simulation
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Proceedings of the conference on Design, automation and test in Europe
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ACM Transactions on Design Automation of Electronic Systems (TODAES)
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We present an extended method of automatic behavioral model generation for nonlinear analog circuits. The focus is on a decrease of simulation time. A procedural model formulation approach is introduced, together with a new simpli.cation method based on the recognition of physical transistor properties of the element models. The simplification process is performed with respect to simulation time, and a hierarchical modeling approach is proposed. The result of these extensions are models with an obvious speed-up in simulation time compared to the simulation of the original netlists.