Dynamic Voltage and Cache Reconfiguration for Low Power

Authors:
Andre C. Nacul;Tony Givargis
Affiliations:
-;-
Venue:
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Year:
2004

Citing 1
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Abstract

In this work, we propose a combined Dynamic Voltage Scaling (DVS) and Dynamic Cache Reconfiguration (DCR) online algorithm that dynamically adapts the processor speed (i.e., voltage) and the cache subsystem to the workload requirements for the purposes of saving energy. The workload is considered to be a set of tasks with real-time deadlines. Our online algorithm is invoked as part of the OS scheduler, which performs standard earliest deadline first (EDF) task scheduling first. Then, our online algorithm, determines an ideal voltage/cache configuration for the current executing task.