System Design with SystemC
VLSI Design of Neural Networks
VLSI Design of Neural Networks
SBRN '02 Proceedings of the VII Brazilian Symposium on Neural Networks (SBRN'02)
SystemC: methodologies and applications
SystemC: methodologies and applications
A Mixed Abstraction Level Co-Simulation Case Study Using SystemC for System on Chip Verification
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
Synthesis of Complex Control Structures from Behavioral SystemC Models
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
Abstraction in FPGA implementation of neural networks
NN'08 Proceedings of the 9th WSEAS International Conference on Neural Networks
A universal abstract-time platform for real-time neural networks
IJCNN'09 Proceedings of the 2009 international joint conference on Neural Networks
Neural network implementation in reprogrammable FPGA devices – an example for MLP
ICAISC'06 Proceedings of the 8th international conference on Artificial Intelligence and Soft Computing
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This work presents the whole System-on-Silicon design flow using SystemC system specification language. In this study, SystemC is used to design a multilayer perceptron neural network, which is applied to an electrocardiogram pattern recognition system. The objective of this work is to exemplify the synthesis of RTL- and behavioral integrated systems. To achievethis, a preprocessing methodology was used to optimize the three main constraints of hardware neural network (HNN) design: accuracy, space and processing speed. This allows a complex HNN to be implemented on a single Field Programmable Gate Array (FPGA). Thehigh level SystemC synthesis allows the straightforward translation of system level into hardware level, avoiding the error prone and the time consuming translation into another hardware description language.