Linux Journal
ISC '01 Proceedings of the 4th International Conference on Information Security
An Adaptive Cryptographic Engine for IPSec Architectures
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
A methodology for protocol design and specification based on an extended state transition model
SIGCOMM '84 Proceedings of the ACM SIGCOMM symposium on Communications architectures and protocols: tutorials & symposium
Performance and Overhead in a Hybrid Reconfigurable Computer
IPDPS '03 Proceedings of the 17th International Symposium on Parallel and Distributed Processing
A Lightweight Approach for Embedded Reconfiguration of FPGAs
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
An overview of reconfigurable hardware in embedded systems
EURASIP Journal on Embedded Systems
A multilayer framework supporting autonomous run-time partial reconfiguration
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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This paper presents a SoPC (System-on-a-Programmable-Chip) embedded system featuring selfreconfigurable capability. It addresses the factors that limitthe system performance when FPGAs are used to implementvarious encryption algorithms dynamically. The limitingfactors are the data transfer rate between the host andthe FPGA, and the reconfiguration latency. The results generatedby the cryptographic engine reported in this papershow that in order to attain optimal performance, it is crucialto floor-plan the reconfigurable part of the FPGA.