One Instruction Set Computers for Image Processing

  • Authors:
  • Phillip Laplante;William Gilreath

  • Affiliations:
  • Engineering, Penn State Great Valley School of Graduate Professional Studies, 30 Swedesford Road, Malvern, PA 19355-1443, USA;1702 Provost Circle, Picayune, MS 39466-2830

  • Venue:
  • Journal of VLSI Signal Processing Systems
  • Year:
  • 2004

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Abstract

Over the fifty-year history of computing computer engineers have sporadically sought to construct minimal computers using only a single simple instruction. While it might appear to be a simple academic exercise, remarkably, a rich computation paradigm can be developed using this approach, with important applications and implications in reconfigurable, chemical, optical, biological (DNA) and quantum computing and in the study of computer architecture. More recently, the widespread use of the Field Programmable Gate Array (FPGA) technology has made such an approach not only desirable, but also practical.To understand the motivation behind single instruction or one instruction computing (OISC), the history of it is reviewed. It is then shown how the paradigm can be used to implement a variety of imaging operations efficiently with a one instruction processor. Finally, a practical application and future work in languages and tools are discussed.