FPGA based hardware acceleration for elliptic curve public key cryptosystems

Authors:
M. Ernst;B. Henhapl;S. Klupsch;S. Huss
Affiliations:
Integrated Circuits and Systems Laboratory, Darmstadt University of Technology, Alexanderstrasse 10, D-64283 Darmstadt, Germany;Cryptography and Computer Algebra, Darmstadt University of Technology, Alexanderstrasse 10, D-64283 Darmstadt, Germany;Integrated Circuits and Systems Laboratory, Darmstadt University of Technology, Alexanderstrasse 10, D-64283 Darmstadt, Germany;Integrated Circuits and Systems Laboratory, Darmstadt University of Technology, Alexanderstrasse 10, D-64283 Darmstadt, Germany
Venue:
Journal of Systems and Software - Special issue: Rapid system prototyping
Year:
2004

Citing 10
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CRYPTO '85 Advances in Cryptology
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PKC '00 Proceedings of the Third International Workshop on Practice and Theory in Public Key Cryptography: Public Key Cryptography
On the Performance of Signature Schemes Based on Elliptic Curves

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VLSI System Design Using Asynchronous Wave Pipelines: A 0.35µm CMOS 1.5 GHz Elliptic Curve Public Key Cryptosystem Chip

ASYNC '00 Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems
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FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
Rapid Prototyping for Hardware Accelerated Elliptic Curve Public-Key Cryptosystems

RSP '01 Proceedings of the 12th International Workshop on Rapid System Prototyping

Performance study of online batch-based digital signature schemes

Journal of Network and Computer Applications

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Abstract

This paper addresses public key cryptosystems based on elliptic curves, which are aimed to high-performance digital signature schemes. Elliptic curve algorithms are characterized by the fact that one can work with considerably shorter keys compared to the RSA approach at the same level of security. A general and highly efficient method for mapping the most time-critical operations to a configurable co-processor is proposed. By means of real-time measurements the resulting performance values are compared to previously published state of the art hardware implementations.A generator based approach is advocated for that purpose which supports application specific co-processor configurations in a flexible and straight forward way. Such a configurable CryptoProcessor has been integrated into a Java-based digital signature environment resulting in a considerable increase of its performance. The outlined approach combines in an unique way the advantages of mapping functionality to either hardware or software and it results in high-speed cryptosystems which are both portable and easy to update according to future security requirements.