Performance estimation of embedded software with instruction cache modeling
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Architectural and compiler techniques for energy reduction in high-performance microprocessors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low-power electronics and design
Code placement in hardware/software co-synthesis to improve performance and reduce cost
Proceedings of the conference on Design, automation and test in Europe
IEEE Transactions on Computers
Software-assisted cache replacement mechanisms for embedded systems
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
OS-Controlled Cache Predictability for Real-Time Systems
RTAS '97 Proceedings of the 3rd IEEE Real-Time Technology and Applications Symposium (RTAS '97)
Using Randomized Rounding to Satisfy Timing Constraints of Real-Time Preemptive Tasks
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
A Code Transformation-Based Methodology for Improving I-Cache Performance of DSP Applications
Proceedings of the conference on Design, automation and test in Europe
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Many embedded system designs usually impose (hard)read-time constraints on tasks. Thus, computing a tight upper boundof the worst case execution time (WCET) of a software is a criticallyimportant, but difficult task. The difficulty arises particularlywhen the code is executed on processors with cache-based memorysystems. In this paper, we propose a new code placement techniqueunder cache activity consideration for real-time software design.Specifically, unlike the previous approaches which have triedto minimize total cache misses, which is not necessarily the bestway to meet all timing constraints of tasks, we minimizes the cachemisses in a selective way for tasks according to the degree of tightness(or urgency) of their timing constraints. Based on a concept ofselective cache activity minimization, we propose a new approachwhich solves the code placement problem in two steps: (Step 1) Wetransform the code placement problem into so called an interval selectionproblem, which then we formulate into a 0-1 integer linearprogramming (ILP); (Step 2) We apply an efficient approximationalgorithm, called Code-map, to solve the exact code placementformulation obtained in Step.