Performance Efficiency of Context-Flow System-on-Chip Platform

  • Authors:
  • Rami Beidas;Jianwen Zhu

  • Affiliations:
  • University of Toronto, Canada;University of Toronto, Canada

  • Venue:
  • Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
  • Year:
  • 2003

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Abstract

Recent efforts in adapting computer networks into system-on-chip(SOC), or network-on-chip, present a setback to the traditionalcomputer systems for the lack of effective programming model,while not taking full advantage of the almost unlimited on-chipbandwidth. In this paper, we propose a new programming model,called context-flow, that is simple, safe, highly parallelizable yettransparent to the underlying architectural details. An SOC platformarchitecture is then designed to support this programmingmodel, while fully exploiting the physical proximity between theprocessing elements. We demonstrate the performance efficiencyof this architecture over bus based and packet-switch based networksby two case studies using a multi-processor architecture simulator.