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Component-based design approach for multicore SoCs
Proceedings of the 39th annual Design Automation Conference
Validation in a component-based design flow for multicore SoCs
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Multiprocessor SoC Platforms: A Component-Based Design Approach
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Will networks on chip close the productivity gap?
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Networks on chip
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Networks on chip
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Networks on chip
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Proceedings of the conference on Design, automation and test in Europe - Volume 2
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Performance Efficiency of Context-Flow System-on-Chip Platform
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Bandwidth tracing arbitration algorithm for mixed-clock SoC with dynamic priority adaptation
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Robust interfaces for mixed-timing systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
NoC Synthesis Flow for Customized Domain Specific Multiprocessor Systems-on-Chip
IEEE Transactions on Parallel and Distributed Systems
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Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
A Quality-of-Service Mechanism for Interconnection Networks in System-on-Chips
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
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Quality-of-service and error control techniques for mesh-based network-on-chip architectures
Integration, the VLSI Journal - Special issue: ACM great lakes symposium on VLSI
Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures
IEEE Transactions on Computers
Mapping and configuration methods for multi-use-case networks on chips
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
A methodology for mapping multiple use-cases onto networks on chips
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Contrasting a NoC and a traditional interconnect fabric with layout awareness
Proceedings of the conference on Design, automation and test in Europe: Proceedings
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A design methodology for application-specific networks-on-chip
ACM Transactions on Embedded Computing Systems (TECS)
Designing application-specific networks on chips with floorplan information
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Implementing DSP Algorithms with On-Chip Networks
NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
Arbiter synthesis approach for SoC multi-processor systems
Computers and Electrical Engineering
Fast exploration of bus-based communication architectures at the CCATB abstraction
ACM Transactions on Embedded Computing Systems (TECS)
Invited paper: Network-on-Chip design and synthesis outlook
Integration, the VLSI Journal
A voltage-frequency island aware energy optimization framework for networks-on-chip
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Synthesis of predictable networks-on-chip-based interconnect architectures for chip multiprocessors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Evaluating the energy consumption and the silicon area of on-chip interconnect architectures
Journal of Systems Architecture: the EUROMICRO Journal
Quality-of-service and error control techniques for mesh-based network-on-chip architectures
Integration, the VLSI Journal - Special issue: ACM great lakes symposium on VLSI
An overview of achieving energy efficiency in on-chip networks
International Journal of Communication Networks and Distributed Systems
Microprocessors & Microsystems
Efficient routing implementation in complex systems-on-chip designs
NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
Efficient switches for network-on-chip based embedded systems
EUC'05 Proceedings of the 2005 international conference on Embedded and Ubiquitous Computing
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Proceedings of the Conference on Design, Automation and Test in Europe
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In this paper, we describe the concept of using an on-chip network as the fundamental communication architecture for a complex SOC design. We describe some of the salient features of a MicroNetwork that we have implemented, and introduce an automated development environment that makes MicroNetwork-based design productive. Finally, we show how one would use our MicroNetwork to integrate an SOC, and provide a general description of several completed MicroNetwork-based designs.