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This paper describes our vision on the architectures required to build next generation systems. Next generation systems will not be PC centric anymore, but they will be built based on distributed, networked, power constraint embedded systems on a chip (SOC) or systems on a multi chip module (SOM). These architectures will consist of large set of heterogeneous building blocks, many of them reconfigurable at different levels of abstraction. The paper will describe new forms of reconfigurable interconnect and it will include a description of the critical position of reconfigurable interconnect in these architectures. The challenge is not to provide general reconfigurability but to tune it to optimize the energy efficiency.