Mapping and configuration methods for multi-use-case networks on chips

Authors:
Srinivasan Murali;Martijn Coenen;Andrei Radulescu;Kees Goossens;Giovanni De Micheli
Affiliations:
CSL, Stanford University, Stanford;Philips Research Laboratories, The Netherlands;Philips Research Laboratories, The Netherlands;Philips Research Laboratories, The Netherlands;LSI, EPFL, Switzerland
Venue:
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Year:
2006

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Abstract

To provide a scalable communication infrastructure for Systems on Chips (SoCs), Networks on Chips (NoCs), a communication centric design paradigm is needed. To be cost effective, SoCs are often programmable and integrate several different applications or use-cases on to the same chip. For the SoC platform to support the different use-cases, the NoC architecture should satisfy the performance constraints of each individual use-case. In this work we motivate the need to consider multiple use-cases during the NoC design process. We present a method to efficiently map the applications on to the NoC architecture, satisfying the design constraints of each individual use-case. We also present novel ways to dynamically reconfigure the network across the different use-cases and explore the possibility of integrating Dynamic Voltage and Frequency Scaling (DVS/DFS) techniques with the use-case centric NoC design methodology. We validate the performance of the design methodology on several SoC applications. The dynamic reconfiguration of the NoC integrated with DVS/DFS schemes results in large power savings for the resulting NoC systems.