MILP based task mapping for heterogeneous multiprocessor systems
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Viper: A Multiprocessor SOC for Advanced Set-Top Box and Digital TV Systems
IEEE Design & Test
Verification strategy for integration 3G baseband SoC
Proceedings of the 40th annual Design Automation Conference
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
The future of multiprocessor systems-on-chips
Proceedings of the 41st annual Design Automation Conference
Multiprocessor Resource Allocation for Hard-Real-Time Streaming with a Dynamic Job-Mix
RTAS '05 Proceedings of the 11th IEEE Real Time on Embedded Technology and Applications Symposium
Ambient functionality: use cases
Proceedings of the 2005 joint conference on Smart objects and ambient intelligence: innovative context-aware services: usages and technologies
Mapping and configuration methods for multi-use-case networks on chips
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Supporting task migration in multi-processor systems-on-chip: a feasibility study
Proceedings of the conference on Design, automation and test in Europe: Proceedings
A methodology for mapping multiple use-cases onto networks on chips
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Global Analysis of Resource Arbitration for MPSoC
DSD '06 Proceedings of the 9th EUROMICRO Conference on Digital System Design
Dynamic and adaptive allocation of applications on MPSoC platforms
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Scenario-based design flow for mapping streaming applications onto on-chip many-core systems
Proceedings of the 2012 international conference on Compilers, architectures and synthesis for embedded systems
Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on adaptive power management for energy and temperature-aware computing systems
Mapping on multi/many-core systems: survey of current and emerging trends
Proceedings of the 50th Annual Design Automation Conference
CADSE: communication aware design space exploration for efficient run-time MPSoC management
Frontiers of Computer Science: Selected Publications from Chinese Universities
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Multi-processor system-on-chip (MPSoC) technology is finding widespread application in the embedded system domain, like in cell phones, automotive control units or avionics. Once deployed in field, these devices always run the same set of applications, in a well-characterized context. It is therefore possible to spend a large amount of time for off-line software optimization and then deploy the results on the field. Each possible set of applications that can be active simultaneously in an MPSoC platform leads to a different use-case that the system has to be verified and tested for. Above all, smooth switching between use-cases falls within the scope of the resource manager, since users should not experience artifacts or delays when a transition between any two consecutive use-cases takes place. In this paper, we propose a semi-static approach to the resource management problem, where the allocation and scheduling solutions for the tasks in each use-case are computed off-line via a Logic Based Benders Decomposition approach using Constraint Programming and stored for use in run-time mapping decisions. The solutions are logically organized in a lattice, so that the transition costs between any two consecutive use-cases can be bound. The resulting framework exhibits both a high level of flexibility and orders of magnitude speed ups w.r.t. monolithic approaches that do not exploit decomposition.