Efficient switches for network-on-chip based embedded systems

Authors:
Hsin-Chou Chi;Chia-Ming Wu
Affiliations:
Department of Computer Science and Information Engineering, National Dong Hwa University, Hualien, Taiwan;Department of Computer Science and Information Engineering, National Dong Hwa University, Hualien, Taiwan
Venue:
EUC'05 Proceedings of the 2005 international conference on Embedded and Ubiquitous Computing
Year:
2005

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Abstract

System-on-a-chip (SoC) has emerged to become a cost-effective approach for embedded systems design with rapid advance of semiconductor technology. It allows designers to integrate a number of heterogeneous IP blocks together based on a system interconnect. However, traditional dedicated wiring as the system interconnect has many shortcomings, such as non-scalable global wire delay, failure to achieve global synchronization, and errors due to signal integrity issues. These problems can be mitigated by the network-on-chip (NoC) architecture based on regular on-chip communication networks. In this paper, we present three efficient switch designs for NoC systems based on circuiting switching. Such switch designs with efficient buffer management can provide the on-chip network with guaranteed throughput and transmission latencies.