Circuit Simulation of Nanotechnology Devices with Non-monotonic I-V Characteristics

  • Authors:
  • Jiayong Le;Larry Pileggi;Anirudh Devgan

  • Affiliations:
  • CMU, Pittsburgh, PA;CMU, Pittsburgh, PA;IBM Research, Austin, TX

  • Venue:
  • Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
  • Year:
  • 2003

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Abstract

As research begins to explore potential nanotechnologiesfor future post-CMOS integrated systems, modeling andsimulation environments must be developed that canaccommodate the corresponding problem complexity and non-traditionaldevice characteristics. This paper describes a circuit-levelsimulator that can accommodate an important class ofnanotechnology devices that are characterized by non-monotonicI-V characteristics. Employing adaptively controlledexplicit integration method (ACES) and piecewise linear (PWL)device models, the proposed approach effectively overcomesthe convergence problems and multiple equilibrium pointsolution problems caused by the Negative DifferentialResistance (NDR) regions in such device I-V functions.Importantly, the ACES approach can address the circuit sizeproblem when partitioning is included, and providecompatibility with simple I-V device model tables, therebyavoiding the need for analytical device models that rarely areavailable for nanotechnology devices.