A fast, highly reliable data compression chip and algorithm for storage systems
IBM Journal of Research and Development
Data compression via textual substitution
Journal of the ACM (JACM)
Dependable Computing and Online Testing in Adaptive and Configurable Systems
IEEE Design & Test
A Reliable LZ Data Compressor on Reconfigurable Coprocessors
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
Heap compression for memory-constrained Java environments
OOPSLA '03 Proceedings of the 18th annual ACM SIGPLAN conference on Object-oriented programing, systems, languages, and applications
Data compression technology in ASlC cores
IBM Journal of Research and Development
Design considerations for the ALDC cores
IBM Journal of Research and Development
Performance as a function of compression
IBM Journal of Research and Development
Titan II: An IPcomp Processor for 10-Gbps Networks
IEEE Design & Test
SVL: Storage Virtualization Engine Leveraging DBMS Technology
ICDE '05 Proceedings of the 21st International Conference on Data Engineering
Energy-aware lossless data compression
ACM Transactions on Computer Systems (TOCS)
Energy and performance evaluation of lossless file data compression on server systems
SYSTOR '09 Proceedings of SYSTOR 2009: The Israeli Experimental Systems Conference
Using data compression for increasing memory system utilization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Algorithms and data structures for compressed-memory machines
IBM Journal of Research and Development
| Hi-index | 0.00 |
This paper reports on work at IBM's Austin and Burlington laboratories concerning fast hardware implementations of general-purpose lossless data compression algorithms, particularly for use in enhancing the data capacity of computer storage devices or systems, and transmission data rates for networking or telecommunications channels. The distinctions between lossy and lossless compression and static and adaptive compression techniques are first reviewed. Then, two main classes of adaptive Lempel-Ziv algorithm, now known as LZ1 and LZ2, are introduced. An outline of early work comparing these two types of algorithm is presented, together with some fundamental distinctions which led to the choice and development of an IBM variant of the LZ1 algorithm, ALDC, and its implementation in hardware. The encoding format for ALDC is presented, together with details of IBM's current fast hardware CMOS compression engine designs, based on use of a content-addressable memory (CAM) array. Overall compression results are compared for ALDC and a number of other algorithms, using the CALGARY data compression benchmark file corpus. More recently, work using small hardware preprocessors to enhance the compression of ALDC on other types of data has shown promising results. Two such algorithmic extensions, BLDC and cLDC, are presented, with the results obtained on important data types for which significant improvement over ALDC alone is achieved.