A built-in timing parametric measurement unit
Proceedings of the IEEE International Test Conference 2001
Automated AC (Timing) Characterization for Digital Circuit Testing
VLSID '98 Proceedings of the Eleventh International Conference on VLSI Design: VLSI for Signal Processing
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ITC '00 Proceedings of the 2000 IEEE International Test Conference
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VTS '01 Proceedings of the 19th IEEE VLSI Test Symposium
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VTS '02 Proceedings of the 20th IEEE VLSI Test Symposium
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ITC '99 Proceedings of the 1999 IEEE International Test Conference
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ITC '99 Proceedings of the 1999 IEEE International Test Conference
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IEEE Transactions on Circuits and Systems Part I: Regular Papers - Special section on 2009 IEEE system-on-chip conference
High effective-resolution built-in jitter characterization with quantization noise shaping
Proceedings of the 48th Design Automation Conference
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On-chip timing-measurement units are needed because accessibility to internal nodes in SoCs is very limited, and performing time interval measurements using automatic test equipment is very difficult and expensive. This article presents a parametric timing measurement solution, which uses self-timed techniques and delivers high linearity and improved accuracy, at low risk of measurement error.