Foundations of parallel programming
Foundations of parallel programming
Rules and strategies for transforming functional and logic programs
ACM Computing Surveys (CSUR)
Lava: hardware design in Haskell
ICFP '98 Proceedings of the third ACM SIGPLAN international conference on Functional programming
HML, a novel hardware description language and its translation to VHDL
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Transformation based communication and clock domain refinement for system design
Proceedings of the 39th annual Design Automation Conference
A case study of hardware and software synthesis in ForSyDe
Proceedings of the 15th international symposium on System Synthesis
Hardware/Software Co-Design Using Functional Languages
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
A framework for comparing models of computation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
System-level design: orthogonalization of concerns and platform-based design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Synchronous approach to the functional equivalence of embedded system implementations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Verification of design decisions in ForSyDe
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Polynomial Abstraction for Verification of Sequentially Implemented Combinational Circuits
Proceedings of the conference on Design, automation and test in Europe - Volume 1
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The ForSyDe methodology has been developed for system level design. Starting with a formal specification model, that captures the functionality of the system at a high abstraction level, it provides formal design transformation methods for a transparent refinement process of the system model into an implementation model that is optimized for synthesis. The main contribution of this paper is the formal treatment of transformational design refinement. Using the formal semantics of ForSyDe processes we introduce the term characteristic function to be able to define and classify transformations as either semantic preserving or design decision. We also illustrate how we can incorporate classical synthesis techniques that have traditionally been used with control/data-flow graphs as ForSyDe transformations. Thus, our approach avoids discontinuities since it moves design refinement into the domain of the specification model.