The TACO protocol processor simulation environment
Proceedings of the ninth international symposium on Hardware/software codesign
Microprocessor Architectures: From VLIW to Tta
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An Object Oriented Programming Approach for Hardware Design
WVLSI '99 Proceedings of the IEEE Computer Society Workshop on VLSI'99
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In this paper we present a design case study in configuring our protocol processor architecture to meet the performance requirements of IPv6 routing at gigabit speeds. Our methodology makes it possible to make fast reliable analyses of the problem on a high level and to find its key bottlenecks and design constraints. Based on the analyses we suggest architectural configurations for the target application. The best configurations can then be further analyzed in more detailed system-level simulations and physical estimations.