Efficiently computing static single assignment form and the control dependence graph
ACM Transactions on Programming Languages and Systems (TOPLAS)
PLDI '92 Proceedings of the ACM SIGPLAN 1992 conference on Programming language design and implementation
Static branch frequency and program profile analysis
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
Speculative execution exception recovery using write-back suppression
MICRO 26 Proceedings of the 26th annual international symposium on Microarchitecture
A new algorithm for partial redundancy elimination based on SSA form
Proceedings of the ACM SIGPLAN 1997 conference on Programming language design and implementation
Exploiting instruction level parallelism in the presence of conditional branches
Exploiting instruction level parallelism in the presence of conditional branches
Register promotion by sparse partial redundancy elimination of loads and stores
PLDI '98 Proceedings of the ACM SIGPLAN 1998 conference on Programming language design and implementation
Partial redundancy elimination in SSA form
ACM Transactions on Programming Languages and Systems (TOPLAS)
Wavefront scheduling: path based data representation and scheduling of subgraphs
Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture
Effective null pointer check elimination utilizing hardware trap
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
The IA-64 Architecture at Work
Computer
CC '98 Proceedings of the 7th International Conference on Compiler Construction
Eliminating Exception Constraints of Java Programs for IA-64
Proceedings of the 2002 International Conference on Parallel Architectures and Compilation Techniques
Effective Representation of Aliases and Indirect Memory Operations in SSA Form
CC '96 Proceedings of the 6th International Conference on Compiler Construction
Speculative register promotion using Advanced Load Address Table (ALAT)
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
A compiler framework for speculative analysis and optimizations
PLDI '03 Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation
Applying Data Speculation in Modulo Scheduled Loops
PACT '00 Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques
A Unified Compiler Framework for Control and Data Speculation
PACT '00 Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques
An empirical study on the granularity of pointer analysis in c programs
LCPC'02 Proceedings of the 15th international conference on Languages and Compilers for Parallel Computing
Sentinel PRE: Hoisting beyond Exception Dependency with Dynamic Deoptimization
Proceedings of the international symposium on Code generation and optimization
Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques
Recovery code generation for general speculative optimizations
ACM Transactions on Architecture and Code Optimization (TACO)
Unified control flow and data dependence traces
ACM Transactions on Architecture and Code Optimization (TACO)
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A general framework that integrates both control and data speculation using alias profiling and/or compiler heuristic rules has shown to improve SPEC2000 performance on Itanium systems. However, speculative optimizations require check instructions and recovery code to ensure correct execution when speculation fails at runtime. How to generate check instructions and their associated recovery code efficiently and effectively is an issue yet to be well studied. Also, it is very important that the recovery code generated in the earlier phases integrate gracefully in the later optimization phases. At the very least, it should not hinder later optimizations, thus, ensuring overall performance improvement. This paper proposes a framework that uses an if-block structure to facilitate check instructions and recovery code generation for general speculative optimizations. It allows speculative instructions and their recovery code generated in the early compiler optimization phases to be integrated effectively with the subsequent optimization phases. It also allows multi-level speculation for multi-level pointers and multi-level expression trees to be handled with no additional complexity. The proposed recovery code generation framework has been implemented in the Open Research Compiler (ORC).