Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 2

Authors:
Taeweon Suh;Hsien-Hsin S. Lee;Douglas M. Blough
Affiliations:
Georgia Institute of Technology;Georgia Institute of Technology;Georgia Institute of Technology
Venue:
IEEE Micro
Year:
2004

Citing 1
Cited 1

Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 1

IEEE Micro

Cache coherence support for non-shared bus architecture on heterogeneous MPSoCs

Proceedings of the 42nd annual Design Automation Conference

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Abstract

Experiments with actual heterogeneous multiprocessor platforms on a shared-bus measure the effectiveness of two cache coherence techniques. This integration approach, snoop-hit buffer, and the accompanying region-based cache coherence approach yield significant speedups compared to a pure software solution.