Interference in multiprocessor computer systems with interleaved memory
Communications of the ACM
Closely coupled multiprocessor systems
ACM-SE 14 Proceedings of the 14th annual Southeast regional conference
Theory, Volume 1, Queueing Systems
Theory, Volume 1, Queueing Systems
Control functions for a multiprocessor architecture
ACM SIGOPS Operating Systems Review
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This paper describes a simple model which provides a procedure for estimating the effect of additional hardware on run time. The additional hardware may be additional processors, more powerful processors, an increase in memory size or additional memory modules. Run time is related to cost effectiveness. A measure of memory interference in the form of effective processing power is determined for multiprocessors and used in the formulation of run time. The overall procedure allows the user to compare different multiprocessor hardware configurations on a cost effective basis.