The cache performance and optimizations of blocked algorithms
ASPLOS IV Proceedings of the fourth international conference on Architectural support for programming languages and operating systems
A singular loop transformation framework based on non-singular matrices
International Journal of Parallel Programming
Compiling for numa parallel machines
Compiling for numa parallel machines
A compiler algorithm for optimizing locality in loop nests
ICS '97 Proceedings of the 11th international conference on Supercomputing
Non-singular data transformations: definition, validity and applications
ICS '97 Proceedings of the 11th international conference on Supercomputing
Cache-conscious structure layout
Proceedings of the ACM SIGPLAN 1999 conference on Programming language design and implementation
Compiler-directed selection of dynamic memory layouts
Proceedings of the ninth international symposium on Hardware/software codesign
Data locality enhancement by memory reduction
ICS '01 Proceedings of the 15th international conference on Supercomputing
High Performance Compilers for Parallel Computing
High Performance Compilers for Parallel Computing
Memory Reuse Analysis in the Polyhedral Model
Euro-Par '96 Proceedings of the Second International Euro-Par Conference on Parallel Processing - Volume I
Constraint Processing
Memory Architecture Exploration for Programmable Embedded Systems
Memory Architecture Exploration for Programmable Embedded Systems
Integrating loop and data optimizations for locality within a constraint network based framework
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Optimizing code parallelization through a constraint network based approach
Proceedings of the 43rd annual Design Automation Conference
Microprocessors & Microsystems
Data locality and parallelism optimization using a constraint-based approach
Journal of Parallel and Distributed Computing
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While loop restructuring based code optimization for array intensive applications has been successful in the past, it has several problems such as the requirement of checking dependences (legality issues) and transformation of all of the array references within the loop body indiscriminately (while some of the references can benefit from the transformation, others may not). As a result, data transformations, i.e., transformations that modify memory layout of array data instead of loop structure have been proposed. One of the problems associated with data transformations is the difficulty of selecting a memory layout for an array that is acceptable to the entire program (not just to a single loop). In this paper, we formulate the problem of determining the memory layouts of arrays as a constraint network, and explore several methods of solution in a systematic way. Our experiments provide strong support in favor of employing constraint processing, and point out future research directions.